Blog | PCB Fab Express

Steps to Design Castellated Holes in PCBs using Altium Designer and Allegro

Written by PCB Fab Express | Oct 19, 2023 9:27:01 PM

Castellated holes in PCBs establish reliable board-to-board connections. These specialized features resemble plated through-holes but with the shape of a semicircle. The holes are positioned at the board outline, therefore enabling seamless soldering of individual board modules.

Highlights:

  • Castellated holes offer improved accessibility and soldering, reduced misalignment risk, simplified measurements, and cleaner board surfaces.
  • Benefits of castellations to integrate individual modules such as WiFi and Bluetooth in a single assembly
  • Detailed steps for designing castellated boards, including setting dimensions, arranging layers, and aligning holes in Altium Designer and Allegro
  • Specifications for hole placement, size, solder mask openings, and annular ring width

Benefits of incorporating castellated holes in PCBs

  1. Easy access to soldering: Since castellated holes in PCBs are of a standard plated hole and placed on the side of the module, it is easier to access and solder them
  2. Proper alignment: Side-mounted holes reduce misalignment risks when pads are positioned below a module
  3. Easy measurements: Plated half-holes enable straightforward distance measurements between holes and solder joints, even after placing a module. This flexibility is absent when solder pads are located below the module
  4. Cleaner board surfaces: These holes, functioning as surface-mount sub-assemblies, seamlessly integrate with other circuit boards, just like SMD components. Consequently, the tight connection between them minimizes the risk of dust accumulation between the two boards.

How are castellated holes created?

Designing plated half-holes is similar to designing through holes. The centers of the castellated are placed on the designated board outline. Thus, half of the plated hole will be on the board, and the other half will be outside.

Steps to create castellated holes in Altium Designer

Let us see the steps involved in designing a castellated board with a finished hole of 0.7 mm, a pad-to-pad distance of 2.54 mm, and a pad diameter of 1.5 mm.

  1. Click on Pad from the toolbar and place a dummy pad with a diameter of 1.5 mm.
  1. Select the dummy pad and set the following dimensions:
  • Hole size = 0.8 mm
  • Tolerance =0.076 mm
  • X-size = 1.5 mm
  • Y-size = 1.5 mm
  1. Now click on Line, and place a 5 mil width trace.
  1. Select Arc(Edge) under the option Place and have the arc on the circumference of the pad.
  1. Now select the pin structure, go to the Tools tab and choose Create Region from Selected Primitives under Convert.
  1. To arrange the board layers, double-click on the selected region, and arrange them in the following folder:
  • Top layer
  • Bottom layer
  • Top paste
  • Bottom paste
  • Top solder
  • Bottom solder
  1. After the layer arrangement, click on the Setup Paste Array. This pops up a window asking you to enter the number of pads. Moreover, you can define it in the item count section. Enter the pad-to-pad spacing in the linear array section as 2.54 mm.
  1. The castellated holes are now created on the edge of the board. To align them, go to Edit, select Set Reference, and choose Center.
  1. Draw the assembly outline and set the line constraint (Line width= 0.15 mm).
  1. To see the 3D view of castellated holes in your PCB, go to Tool, and select Manage 3D bodies for Current Component.

You can now examine all the layers and sides of the board in 3D.

Key takeaways:

Steps to create a castellated board in Altium Designer:

  1. Place a dummy pad with the required dimensions
  2. Draw a trace and an arc around the pad
  3. Create a region with the set primitives
  4. Arrange board layers and set up the paste array
  5. Align the castellated holes and draw the assembly outline
  6. Verify dimensions and spacing using measurement tools
  7. Visualize the board using the 3D view option

How to create a castellated board in Allegro

  1. First you need to select Package Geometry under the active class and subclass section. Now, go to Add, and select Line to draw the outer line of the pin.
  1. After creating the outline, go to Add, and select 3pt Arc, to draw the arc. According to the workspace scale (0.25 mm per unit), the diameter of this dummy pad is equal to 1.5 mm.
  1. Now, go to Shape and select Compose Shape, and click on the dummy pad to save the pad outline.

 

  1. Next, go to File, Export, choose Sub-Drawing, and save the file with a designated name. Here the file is saved as shp90*32 and the type as a clipboard file.
  1. Go to File, select Import, and choose the saved sub-drawing.
  1. Now, you need to open the template that is saved in step 4. Go to file, open, and select the saved clipboard file(shp90*32). Next, click on the pad symbol on the toolbar to create a dummy pad.
  1. Go to Tools, click on Padstack and choose Modify Design padstack and place the pad.
  1. Select Grids from the Setup tab to modify the parameters.
  1. Click on Copy to duplicate the created pads.
  1. Now, click on Measure to check the pad dimensions.
  1. To modify the pad dimensions, right-click on the pad, select Snap pick to, and click on Pad Edge. Next, go to Setup and choose grid to define the spacing between the pads.
  1. Now, you need to draw the assembly outline. Go to Package Geometry and select Assembly_top. To verify the pad spacing, click on measure.
  1. Now add a silkscreen to the board with a line width of 0.15 mm. This option is available in Package Geometry.
  1. Designate the 1st pin using the pin indicator. In addition to that, place it at a distance of 0.05 mm from the board edge.
  1. To define the board size, go to Edit, click on Package Height Max, and set it to 2.5 mm. This value depends on your requirements.
  1. Click on 3D from the toolbar to view 3-dimensional model of your board.
  1. A castellated board with the given dimensions is created now.

Key takeaways:

  • Draw the outer line of the pin and add a 3pt arc to create dummy pads
  • Create a sub-drawing, import it, and define the padstack
  • Set up grid parameters and measure dimensions
  • Draw silkscreen, designate pin 1, and specify board size
  • Check the model in 3D for a detailed view

Design tips for building a castellated circuit board

  • Ensure that the center of each castellated hole is precisely positioned along the edge of your board, and it's essential that these holes are plated through. Make sure to include them in the drill files.
  • Always position castellated holes along either the top or bottom edges of the board.
  • Utilize pads for the copper layers
  • To safeguard your board against corrosion and physical damage, provide an accurate solder mask opening.
  • Maintain the finished hole size (as indicated by (a) in the image above) within the range of 0.5 mm to 0.8 mm.
  • Design the size of the castellated pads as mentioned below:
    • Diameter of the pad = Finished hole size + 0.7 mm
    • For example, if the finished hole size is 0.8 mm, then the pad diameter will be 1.5 mm.
    • Maintain sufficient width for the annular ring, or else the plating will break out.
    • The minimum diameter for drilling half-holes is 0.5 mm.
    • Maintain a minimum solder mask clearance of 0.1 mm.
    • Keep the solder mask bridge between 0.1 mm - 0.15 mm.
    • Keep the pads at a distance of 2.54 mm (b) from each other.
    • Ensure the annular ring width is 0.3 mm per side. This is calculated as follows:

Annular width = (Diameter of the pad-diameter of the finished hole) /2

  • Edge plating is used for the metallization of castellated pins. Here, copper will be deposited along the semi-hole walls. Consider these guidelines for an efficient plating process:
    • Overlap from the board edge should be at least 0.5 mm.
    • A minimum of 0.3 mm of connected copper must be defined on the connected layer.
    • The spacing between the hole wall and the copper feature on a non-connected outer layer should be a minimum of 0.8 mm.
  • ENIG coating is preferred as it provides a smooth finish and eliminates the formation of lumps during the coating process.
  • IPC-6012 sets the tolerance limits for castellated holes in PCBs as follows:

Parameters

Tolerances

Size of the pad

±20%

Castellated hole size

± 3 mil

Board thickness

10% or ± 3 mil whichever is larger (thickness should be equal to greater than or equal to 31 mil)

Dril diameter

± 3 mil

Drill-to-copper

Minimum 8 mil

Hole-to-hole

6 mil

Key takeaways:

  • Center of each hole must be on the board edge, plated through, and included in drill files
  • Maintain finished hole size between 0.5 mm and 0.8 mm
  • Pad diameter = Finished hole size + 0.7 mm
  • Annular ring width = (Pad diameter - Finished hole size) / 2 (minimum 0.3 mm)
  • Use edge plating method for the metallization of castellated pins
  • Prefer ENIG coating for a smooth finish and adherence to IPC-6012 tolerance limits

Castellated holes in PCBs enable direct soldering of a sub-circuit to the main module, and eliminate the requirement for external connector pins. This not only substantially lowers the board's overall cost but also accelerates the assembly process.

We believe this tutorial has been beneficial for designing castellated boards in Altium Designer and Allegro. If you need any further help with designing castellated PCBs, please let us know in the comments section. Our designers will be glad to assist you.